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Director of Silicon Test Engineering

Lumilens · San Jose

Extracted from the posting

Base
Not stated
Remote
On-site
Funding
Well-funded startup backed by Mayfield
Stack
Advantest 93K, Teradyne, C, C++

Lead test strategy and execution for Lumilens silicon photonics and semiconductor products, from characterization through wafer sort, final test, and high-volume production. Develop ATE test solutions on Advantest 93K and/or Teradyne platforms and optimize test time, coverage, and cost. Build and lead a silicon test engineering team.

ABOUT LUMILENS

At Lumilens we are building the critical photonics infrastructure that powers tomorrow’s AI supercomputing. From chip-to-chip optical interconnects to scalable photonic engines, Lumilens is unlocking a new era of computing - faster, cooler, and massively more efficient.

We’re a well-funded startup backed by Mayfield and led by veterans who’ve built and scaled some of the most transformative technologies in the industry. At Lumilens, we’re developing high-speed photonics products purpose-built to power the future of AI infrastructure and high-performance computing.

This isn’t incremental innovation, it’s a ground-floor opportunity to rethink the optical layer from the silicon up. You’ll work alongside a team of world-class engineers solving some of the hardest challenges in scaling optical systems. Every line of code, every design decision, every breakthrough you help deliver will shape the infrastructure of tomorrow.

If you're looking for mission, momentum, and the chance to make an outsized impact, jump on the rocket ship. We’re just getting started.


About Lumilens

At Lumilens, we are building the critical photonics infrastructure powering the next generation of AI supercomputing. From chip-to-chip optical interconnects to scalable photonic engines, our technology enables faster, cooler, and dramatically more efficient systems. Backed by leading investors and built by industry veterans, we are scaling rapidly to bring cutting-edge silicon photonics into high-volume production.


The Role

As Director of Silicon Test Engineering, you will lead the strategy and execution of test development for Lumilens’ silicon photonics and semiconductor products. You will be responsible for building scalable, high-quality test solutions from characterization through high-volume production.

This role partners closely with design, product, and operations teams to ensure robust test coverage, optimized test cost, and high-yield manufacturing. You will play a critical role in ensuring only fully validated, high-performing devices reach our customers.


What You’ll Do

Lead Test Strategy & Execution

  • Define and drive the end-to-end silicon test strategy from characterization to wafer sort and final test
  • Lead development of ATE test solutions on platforms such as Advantest 93K and/or Teradyne
  • Establish scalable test architectures to support rapid product ramps and high-volume manufacturing
  • Own test coverage, quality metrics, and outgoing product reliability

Drive Yield & Test Optimization

  • Optimize test flows to reduce test time, improve coverage, and lower cost of test
  • Partner with product and process engineering to analyze yield data and drive continuous improvement
  • Identify and eliminate test escapes, ensuring robust screening of marginal or underperforming devices
  • Implement data-driven methodologies for yield learning and production ramp

Partner with Design & Cross-Functional Teams

  • Collaborate with design and DFT teams to ensure testability and coverage are built into products early
  • Translate simulation test patterns into ATE programs and production-ready solutions
  • Lead test plan reviews and drive alignment across engineering, product, and operations teams
  • Support new product introduction (NPI) and ensure seamless transition to high-volume manufacturing

Develop Test Infrastructure & Hardware

  • Oversee development of high-speed test hardware and interfaces for advanced silicon photonics devices
  • Ensure test solutions meet performance requirements for high-speed and mixed-signal applications
  • Drive innovation in test methodologies as product complexity exceeds standard tester capabilities

Leadership

  • Build and lead a high-performing silicon test engineering team
  • Set clear goals, drive accountability, and foster a culture of execution and continuous improvement
  • Mentor and develop engineers across test, product, and operations functions
  • Lead through influence across internal teams and external partners


What We’re Looking For

  • 10+ years of experience in semiconductor or silicon photonics test engineering
  • 5+ years of leadership experience managing engineering teams or complex test programs
  • Deep expertise in ATE test development (Advantest 93K and/or Teradyne platforms)
  • Strong background in silicon validation, production test, DFT/DFM, and high-speed digital or mixed-signal testing
  • Experience optimizing test time, coverage, yield, and cost in high-volume manufacturing
  • Proficiency in programming/scripting (C/C++, Python, Perl) and Linux environments
  • Proven ability to collaborate cross-functionally and drive alignment across design, product, and operations
  • Strong analytical, problem-solving, and communication skills
  • Comfortable operating in a fast-paced, startup environment


What We Offer

  • Competitive salary commensurate with experience
  • Comprehensive benefits package including health insurance
  • Professional development opportunities and certification support
  • Access to cutting-edge photonics technology and advanced packaging environments
  • Collaborative work environment with cross-functional teams solving complex engineering challenges


*Lumilens is an equal opportunity employer. All qualified applicants will receive consideration without regard to race, color, religion, gender, identity, orientation, veteran status, disability, or any other legally protected status.



Technologies

Advantest 93KTeradyneCC++PythonPerlLinux
Lumilens
Lumilens
Website

Job details

TypeFull-time
Work ModeOn-site
LevelExecutive
Location🇺🇸San Jose, CA
PostedNov 05, 2026
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