156 matches
Staff Digital Verification Engineer
1 month agoEfficient Computer · San Jose, CA
On-siteFull-timeVerilog · VHDL
STA Physical Design Engineer, Senior Principal
1 month agoAstera Labs · San Jose, CA
On-siteFull-timeCXL · Ethernet
Staff SoC Design Engineer
2 months agoWaymo · Mountain View, CA
On-siteFull-timeVerilog · SystemVerilog
Senior Formal Verification Engineer
2 months agoWaymo · Mountain View, CA
On-siteFull-timeC++ · Verilog
Physical Design Engineer
2 months agoHudson River Trading · Austin, TX
On-siteFull-timeASIC · FPGA
Hardware Engineer Internship - Summer 2027
2 months agoHudson River Trading · New York, NY
On-sitePart-timeFPGA · ASIC
Hardware Design Engineer - 2027 Grads
2 months agoHudson River Trading · New York, NY
On-siteFull-timeFPGA · ASIC
Experienced Hardware Design Engineer
2 months agoHudson River Trading · Austin, TX
On-siteFull-timeFPGA · ASIC
Design Verification (DV) Engineer - 2027 Grads
2 months agoHudson River Trading · New York, NY
On-siteFull-timeFPGA · ASIC
Design Verification (DV) Engineer
2 months agoHudson River Trading · Austin, TX
On-siteFull-timeSystemVerilog · FPGA
Principal Radio Frequency Engineer
2 months agoTwo Six Technologies · Herndon, VA
On-siteFull-timeC · MATLAB
Staff Design Verification Engineer, AI HW
2 months agoTenstorrent · Austin, TX
On-siteFull-timeSystemVerilog · simulation tools
Sr Staff Engineer, SoC RTL Design
2 months agoTenstorrent · Toronto, ON
On-siteFull-timeSystemVerilog · RISC-V
Sr. Engineer, Systems Debug
2 months agoTenstorrent · Toronto, ON
On-siteFull-timeRISC-V · AI
Software Engineer, TT-Fabric
2 months agoTenstorrent · Austin, TX
On-siteFull-timeC++ · Python
CPU Microarchitect, Vector and Matrix Compute
2 months agoTenstorrent · Santa Clara, CA
On-siteFull-timeRISC-V · SystemVerilog
Principal Design Verification Engineer (Silicon Engineering)
2 months agoSpaceX · Irvine, CA
On-siteFull-timeSystemVerilog · Verilog
Principal Design Verification Engineer (Silicon Engineering)
2 months agoSpaceX · Redmond, WA
On-siteFull-timeSystemVerilog · Verilog
Principal Design Verification Engineer (Silicon Engineering)
2 months agoSpaceX · Austin, TX
On-siteFull-timeSystemVerilog · Verilog
Principal Design Verification Engineer (Silicon Engineering)
2 months agoSpaceX · Palo Alto, CA
On-siteFull-timeSystemVerilog · Verilog
