Normal Computing | Build with Us

Normal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), and London.

The Role

Normal's hardware runs the most memory-bound parts of large-model inference inside memory itself, rather than shuttling weights to a processor. The software that makes this programmable doesn't exist yet in any standard form. Nothing off the shelf simulates it, so the tool our compiler and hardware teams depend on to validate their work before silicon exists has to be built, not bought. As our Simulator & Debug Tools Lead, you will own that simulator, along with the debugging and profiling tools that integrate with our compiler.

This is a hands-on technical leadership role. Fidelity, speed, and tooling all compete for the same hours, and you will decide where those hours go, keeping the rest of the team honest about what the chip can actually do.

What You Will Own

• Simulator Architecture: Own the architecture and roadmap of our hardware simulator, including accuracy, performance, and coverage of new hardware features as they land. Success means compiler and runtime work never waits on hardware.
• Behavioral Correctness: Make the simulator's behavior, state, and memory semantics trustworthy enough that compiler and runtime engineers can act on what it tells them.
• Debug and Profiling Tools: Build the debuggers, tracers, and profilers engineers actually reach for, measured by how quickly the team can find and fix a bug.
• Hardware Correlation: Partner with our Design Verification and bring-up teams to correlate the simulator with RTL, FPGA prototypes, and eventually silicon, and close the loop when they disagree.
• Workload Benchmarks: Build simulator benchmarks and traces from LLM inference workloads, so fidelity is measured against what the chip actually needs to run.
• Investment Tradeoffs: Decide where simulator fidelity, simulator speed, and tooling investment go, and explain those tradeoffs to the compiler and hardware teams.

What Makes You a Great Fit

• Experience building or leading development on hardware simulators, cycle-accurate or functional, for ASICs or novel compute architectures
• Tooling instincts: you have built debuggers, tracers, or profilers that other engineers actually adopted
• Enough systems and compiler context to simulate the software stack running on the hardware, as well as the hardware itself
• Comfort working where the hardware being simulated is still evolving, and the simulator has to evolve with it
• Fluency in C++ or Rust for simulator performance, and familiarity with Python for tooling

Bonus Points

• Experience with in-memory compute or other non-von-Neumann architectures
• Experience building simulators that fed directly into architectural or compiler decisions, beyond post-hoc validation
• Experience with open-source simulation, tracing, or hardware-tooling communities
• Background spanning both pre-silicon simulation and post-silicon bring-up

Equal Employment Opportunity Statement

Normal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.

Accessibility Accommodations

Normal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at [email protected].

Privacy Notice

By submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Applicant Privacy Notice.